Intel, Micron Share New Information on 32-layer 3D NAND

Not to be outdone by Toshiba/SanDisk’s introduction of their 48-layer BiCS 3D NAND earlier today, Intel/Micron recently held a webinar announcing that they’ve begun shipping their 3D NAND product as well.

Intel/Micron’s 3D NAND product was first unveiled late last year during Intel’s annual investor meeting and it appears that the two companies are trying to remind everyone that development of said 3D NAND is still on track. As we’ve been told before, Intel/Micron’s 3D NAND will be a 32-layer product that’s expected to ship in both 2-bit per cell MLC and 3-bit per cell MLC later this year. Die capacities are expected to be industry leading at 256Gb (32GB) for the 2-bit per cell MLC product and 384Gb (48GB) for the 3-bit per cell MLC product. Intel expects to be able to ship capacities of up to 10TB on a 2.5″ 7mm form factor drives and 3.5TB on the M.2 form factor.

During the webinar, Intel/Micron did additionally reveal that their 3D NAND will be using traditional floating gate technology, which is an interesting move on their part. According to Intel VP of NVM Technology Development, Giri Giridhar, the choice to use floating gate technology was made several years back as it was proven technology which Intel and Micron had plenty of experience working with. Samsung and Toshiba/SanDisk 3D NAND products use newer charge trap flash technology which removes the floating gate out of the equation. Charge trap flash technology is believed by most in the flash industry to be superior to floating gate technology as it’s generally cheaper to produce, provides higher yields, and has higher reliability (less electron leakage, interference, etc.). That said, if anyone has the expertise to produce the best floating gate based design on the market, it’ll definitely be Intel/Micron.

Intel/Micron is currently sampling their 3D NAND product with high volume sample availability expected in 2H2015. Full volume production is expected to be sometime at the end of the year.